
MEMORY AND I/O DECODING 239
Note the above instruction which initiates a read cycle. It is the case of reading a byte. Only
the even (low) bank need be enabled to read. However, even if the high bank is also enabled, it
does not matter. e data present on the lines D
8
to D
15
will not be used by the processor. It takes
into AL, only the data on lines D
0
to D
7
and ignores the data on the upper bus. However, the
writing process creates a problem. Observe the case of the following write instruction:
MOV [0000], AL
is should cause only the even bank to be enabled. If the odd (upper) bank also gets enabled,
the logic levels on the data lines ...