Design Recipes for FPGAs: Using Verilog and VHDL

Design Recipes for FPGAs

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Also, the output equation of the resistor must be modeled as an

analog equation in VHDL-AMS using the ‘’ operator to

implement the function v  I * rnom:

ARCHITECTURE simple OF resistor IS

QUANTITY v ACROSS I THROUGH p TO m;

BEGIN

v == I * rnom;

END ARCHITECTURE simple;

Differential equations in VHDL-AMS

VHDL-AMS also allows the modeling of linear differential equa-

tions using the two differential operators:

1. ‘DOT (Differentiate the variable with respect to time)

2. ‘INTEG (Integrate the variable with respect to time)

We can illustrate this by taking two examples, a capacitor and an

inductor. First, consider the basic equation ...