Semiconductors

Migrating Industrial DfM into IC Manufacturing 83

gradients of pattern density (PD). It decreases sharply when ∆PD exceeds

a certain value. For low PD, the polishing time is typically shorter, and the

CMP process would be less likely to result in overpolishing of the ILD so

the potential yield drop is smaller for PD on the order of 30% than for PD on

theorder of 60%.

A common method to improve CMPLY is by adding ll pattern. This has

to be modeled independently from LFD and CAA. PD rules may rst require

adjusting drawn geometries because adding ll pattern to any preexisting

layout may not always be effective.

CMP optimization may be based ...