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The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
book

The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson

by Lyla B. Das
May 2024
Intermediate to advanced
889 pages
30h 8m
English
Pearson India
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
11-28
THE
x86 MICROPROCESSORS
address in memory and the number of bytes to be transferred have to be specified. For
each channel, the DMA controller saves the programmed address and count in the base
registers and maintains copies of the information in the current address and current count
registers, as shown in the figure.
Each DMA channel is enabled and disabled via a DMA mask register. When DMA
is started by writing to the base registers and enabling the DMA channel, the current
registers are loaded from the base registers. With each DMA transfer, the value in the
current address register is driven onto the address bus, and the current address register is
automatically incremented. The current count register determines the number of trans
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Publisher Resources

ISBN: 9781322128481