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The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson

by Lyla B. Das
May 2024
Intermediate to advanced
889 pages
30h 8m
English
Pearson India
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
14-38
THE
x86 MICROPROCESSORS
ii) The context of the current task is saved, i.e., contents of the registers are copied to
the TSS. The EIP register, which is now stored in the TSS, will be pointing to the
next instruction after the one that caused the task switch. These actions correspond
to ‘saving the context’ of the abandoned task.
iii) Next, the actions for taking up the new task are begun. The Task Register (TR) is
loaded with the new task’s selector. The selector is either the operand of a control
transfer instruction or is taken from a task gate, which gets the TSS descriptor and
then the TSS from memory.
iv) Now the new task can be proceeded with. For that, its state is loaded from the TSS
into the corresponding registers. The registers ...
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Publisher Resources

ISBN: 9781322128481