May 2024
Intermediate to advanced
889 pages
30h 8m
English
book
The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
by Lyla B. Das
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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ATOM SoC–INTEL’S HIGH-END EMBEDDED PROCESSOR 18-19
18.5.4 | Power Management at Multiple Levels
It is not only at the CPU and system level that various sleep states are defined. They can
be defined for individual devices and links and also for a global system view. All these
are listed in the following.
i) Global view: Gx states
ii) System: Sx states
iii) CPU: Cx states
iv) PCI/PCI-X Bus: Bx states
v) PCI Express Links: Lx states
vi) Devices: Dx states
vii) Thermal: Tx States
18.6 | The Silver Mont Micro Architecture
We have talked about the Bonnell architecture, which is based on a 45 nm technol-
ogy. Its smaller die version (32 nm) of is named ...
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