May 2024
Intermediate to advanced
889 pages
30h 8m
English
book
The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
by Lyla B. Das
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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12-10
THE
x86 MICROPROCESSORS
that says that CAS functions as the output enable as well. Some time after the CAS sig-
nal is activated, the data becomes available at the data bus, and the processor needs
some time to read it. So, the CAS should remain active until the processor reads it. If
CAS is inactivated, the output buffers are disabled, and the data is no longer available
at the output. However, only after the CAS signal goes high can a new cycle start.
Thus, delaying the inactivation of the CAS signal creates a small delay. If this delay
can be avoided, the speed of the memory can be increased.
In EDO DRAMs, a new cycle can start by ...
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