May 2024
Intermediate to advanced
889 pages
30h 8m
English
book
The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
by Lyla B. Das
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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20-26
THE
x86 MICROPROCESSORS
;the ISR of Timer 1
T1_ISR: CLR TR1 ;stop Timer 1
CPL P1.3 ;complement P1.3
MOV TL1,#024H ;low byte of OFF time count
MOV TH1,#0FAH ;high byte of OFF time count
SETB TR1 ;start timer
RETI
END
The problem in Example 20.17 uses the value of delay in Example 20.5. A symmetric
square wave is to be generated using mode 1, which needs the count to be re-loaded after
each cycle.
In the main program, the timer is started, but no count value is loaded into its reg-
isters. It starts with the default value of 0. The timer flag gets set and then an interrupt
occurs, which takes control to the label T1_ISR. Here, the ...
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