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The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson

by Lyla B. Das
May 2024
Intermediate to advanced
889 pages
30h 8m
English
Pearson India
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
PROGRAMMING THE PERIPHERALS OF 8051 20-31
the setup. At the H to L edge of the square wave, an interrupt is generated. The ISR
performs the following two actions:
i) Complements the pins of port 1 to which LEDs are connected (not shown in the
figure).
ii) Complements the pin P2.1,to which a relay is connected. This relay switches ON
and OFF a high power light source (not shown in the figure).
Note From Fig. 20.24b it is seen that the rate of all these actions is half that of the
incoming signal.
ORG 0 ;starts up at this address
LJMP STRT ;bypass interrupt vectors
ORG 0013H ;vector of EX1
LJMP ISR_X1 ;jump to ISR
ORG 0040H ;main
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Publisher Resources

ISBN: 9781322128481