The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson

20-8

THE

x86 MICROPROCESSORS

SFR are given in this figure. Looking at the map, you will find that all the addresses

are not used but are reserved for more peripherals that may be added later for different

versions. You can also note that the registers A, B, PSW and ports P0 to P3 also have

their addresses in this map.

Now, our interest will be to use some of these registers for peripheral programming.

The first peripheral we learn is the timer/counter.

20.3 | Timers of 8051

The 8051 has two timer units, namely, T0 and T1. They are independent of each other

and can operate simultaneously.

The functions that a timer can perform are as follows:

i) It can create a delay or an interval of time—then we call it an ‘interval timer’

ii) It can also do ...