May 2024
Intermediate to advanced
889 pages
30h 8m
English
book
The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
by Lyla B. Das
Content preview from The X 86 Microprocessors: Architecture, Programming and Interfacing (8086 to Pentium) 2nd Edition by Pearson
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MICROARCHITECTURAL TECHNIQUES OF ADVANCED PROCESSORS 15-39
Figure 15.28 shows a comprehensive picture of the P6 architecture. The following points
make the understanding of the block diagram more complete.
i) There are five different functional units in the Execution stage.
ii) The Register Alias table is part of the Register Rename logic.
iii) The decoding logic has three sections for catering to different levels of complexity
of the instructions involved.
iv) After decoding into micro-codes, a sequencer sends them to the execution unit.
v) The Retirement Register File is the same as the ARF of the processor, because when
an instruction ...
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