e 3-byte, two-cycle instruction JBC (opcode 10H) is identical with the JB instruction in all respects, except
that it clears the addressed bit before jumping to the relative address if the addressed bit is set. Otherwise, it
proceeds sequentially if the addressed bit is 0 (cleared). It does not aff ect any fl ag of PSW. e second byte
contains the address of the bit, and the third byte contains the relative off set for jumping, having the range of
127 bytes forward or 128 bytes backward.
12.12 | RETI Instruction
e 1-byte, two-cycle (opcode 32H) instruction RETI (return from interrupt service routine) is identical
with the instruction RET (return from subroutine) in all aspects except one. ...
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