May 2024
Intermediate to advanced
534 pages
17h 58m
English
book
8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
by Subrata Ghoshal
Content preview from 8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
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TIMER/COUNTER INTERRUPTS
15.6.2 | Diff erences with Timers 0 and 1
(i) Interrupt fl ag must be cleared by the Timer 2 ISR.
(ii) ree diff erent modes: 16-bit auto-reload, 16-bit capture and baud-rate generator.
(iii) Vector address 002BH for placing Timer 2 ISR.
(iv) Awarded lowest priority among all six interrupts (adjustable by IP).
(v) Controlled by T2CON SFR (bit-addressable).
(vi) Separate capture registers are provided.
RCLK + TCLK CP/RL2 TR2 MODE
xX0Off
0 0 1 16-bit auto-reload
0 1 1 16-bit capture
1 X 1 Baud-rate generator
Table 15.4 Mode setting for Timer 2
15.6.3 | Modes of Timer 2
As indicated above, the modes of Timer 2 are diff ...
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