May 2024
Intermediate to advanced
534 pages
17h 58m
English
book
8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
by Subrata Ghoshal
Content preview from 8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
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bit 2 of T2CON SFR. e Counters, TL2 and TH2, are interfaced with RCAP2L and RCAP2H registers.
is interfacing is bi-directional (only one direction is shown in Fig. 15.13). Timer 2 interrupt is generated
by activation of either of the two fl ags, namely TF2 and EXF2. ey are bit 7 and bit 6 of T2CON SFR.
Once Timer 2 interrupt is evoked, the fl ag responsible for generating the interrupt must be cleared by the
ISR itself. is is a major diff erence with the previous two Timers where the interrupt fl ag was automati-
cally cleared by the processor itself during branching to the ISR.
External control through T2EX pin (P1.1) is also available ...
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