May 2024
Intermediate to advanced
534 pages
17h 58m
English
book
8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
by Subrata Ghoshal
Content preview from 8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
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18
GENERAL ARCHITECTURE
e internal data memory of 8051 is divided into three separate functional parts as
• register banks (address 00H to 1FH),
• bit-addressable area (address 20H to 2FH) and
• scratch-pad area (address 30H onwards).
is is shown in Fig. 2.7.
7FH
General purpose
scratch-pad area
(80 bytes)
Bit-addressable area
128 bits (16 bytes)
32 general purpose
Registers (32 bytes)
30H
2FH
20H
1FH
00H
Figure 2.7 Major divisions of lower 128 bytes of internal RAM of XX51
2.5.1 | Register Banks
e lowest part of the internal RAM accommodates four general-purpose register banks designated as bank #0, #1,
#2 and #3. Each bank contains eight general-pur ...
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