May 2024
Intermediate to advanced
534 pages
17h 58m
English
book
8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
by Subrata Ghoshal
Content preview from 8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
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TIMER/COUNTER INTERRUPTS
15.4.4 | IP (bits 1 and 3)
Although all interrupts have their individual default priorities, it may be changed through software by pro-
gramming the IP SFR as depicted in Fig. 15.12. e priority of Timer 0 is controlled by PT0 (bit 1 of IP) and
that of Timer 1 is controlled by PT1 (bit 3 of IP). Setting a bit allows higher priority and its clearing allows
lower priority of the concerned interrupt.
SFR Direct address Description
TL0 8AH Timer 0 Counter (lower byte)
TH0 8CH Timer 0 Counter (higher byte)
TL1 8BH Timer 1 Counter (lower byte)
TH1 8DH Timer 1 Counter (higher byte)
Table 15.3 Direct addresses of Timer Counters ...
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