May 2024
Intermediate to advanced
534 pages
17h 58m
English
book
8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
by Subrata Ghoshal
Content preview from 8051 Microcontroller, Internals, Instructions, Programming and Interfacing, 2nd Edition
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(iv) Enable INT0 by setting IE.0.
(v) Enable the global interrupt control bit by setting IE.7.
Sequence of Steps (ii) and (iii) may be interchanged. Step (ii) is optional. It is a good practice to enable the
global interrupt control bit at the end of all operations.
14.4.2 | Checklist for INT1
(i) Place ISR for INT1, which is terminated by RETI instruction, at program memory location 0013H.
If the ISR is long, it may be placed anywhere within the program memory, and an unconditional
jump instruction should be placed at 0013H to access the ISR.
(ii) If necessary, set priority through IP.2.
(iii) Select the interrupt signal type ...
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