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4.2.4 | Register Indirect Addressing Mode
For this addressing mode, the address of the data is available in a register. In MCS-51, two registers,
namely R0 and R1 of the currently active register bank, are allowed to store such an address. For example,
an instruction MOV A, @R1 is taken, whose opcode is E7H. It is assumed that before the execution of
the instruction, register R1 of the active bank #0 was loaded with 30H and location 30H contained a data,
say D2H.
Being a 1-byte one-cycle instruction, when executed, this instruction takes the content of register R1
(30H) as the address and the content of this address (D2H) is copied to the ...