March 2006
Intermediate to advanced
576 pages
11h 43m
English
book
Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
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13.3 BIBLIOGRAPHY
[AND1967] S. F. Anderson, J. G. Earle, R. E. Goldschmidt, and D. M. Powers, The IBM System/360 Model 91: Floating-point execution unit. IBM J. Res. Dev. 11: 34–53 (1967).
[ERC1987] M. D. Ercegovac and T. Lang, On-the-fly conversion of redundant into conventional representations. IEEE Trans. Comput. 36(7): 895–897 (1987).
[ERC1992] M. D. Ercegovac and T. Lang, On-the-fly rounding. IEEE Trans. Comput. 41(12): 1497–1503 (1992).
[ERC1994] M. D. Ercegovac and T. Lang, Division and Square-Root: Digit-Recurrence Algorithms and Implementations. Kluwer Academic Publishers, New York, 1994.
[INT1989] Intel i860 64-bit Microprocessor Programmer's Reference Manual, 1989.
[MAR1990] P. W. Markstein, Computation of the elementary functions on the IBM RISC System/6000 Processor. IBM J. Res. Dev., 111–119 (1990).
[MON1994] P. Montuschi, and L. Ciminiera, Over-redundant digit sets and the design of digit-by-digit division units. IEEE Trans. Comput., 43(3): 269–277 (1994).
[OBE1999] S. F. Oberman, Floating point division and square root algorithms and implementation in the AMD-K7 Microprocessor. Proceedings of the 14th IEEE Symposium on Computer Arithmetic, 106–115 (1999).
Synthesis of Arithmetic Circuits: FPGA, ASIC, and Embedded Systems By Jean-Pierre Deschamps, Géry J. A. Bioul, and Gustavo D. Sutter Copyright © 2006 John Wiley & Sons, Inc.