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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
book

Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
March 2006
Intermediate to advanced
576 pages
11h 43m
English
Wiley-Interscience
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

3.4 BIBLIOGRAPHY

[ANS1985] ANSI and IEEE, IEEE Standard for Binary Floating-Point Arithmetic, ANSI/IEEE Standard, Std 754-1985, New York, 1985.

[BOO1951] A. D. Booth, A signed binary multiplication technique. Q. J. Mechanics Appl. Math., June: 236-240 (1951).

[ERC2004] M. Ercegovac and T. Lang. Digital Arithmetic, Morgan Kaufmann Publishers, San Francisco, CA, 2004.

[PAR1999] B. Parhami, Computer Arithmetic: Algorithms and Hardware Designs, Oxford University Press, New York, 1999.

Synthesis of Arithmetic Circuits: FPGA, ASIC, and Embedded Systems By Jean-Pierre Deschamps, Géry J. A. Bioul, and Gustavo D. Sutter Copyright © 2006 John Wiley & Sons, Inc.

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