Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

9.5 HARDWARE DESCRIPTION LANGUAGES (HDLs)

A hardware description language (HDL) is a computer language designed for formal description of electronic circuits. It can describe a circuit operation, its structure, and the input stimuli to verify the operation (using simulation). A HDL model is a text-based description of the temporal behavior and/or the structure of an electronic system. In contrast to a software programming language, the HDL syntax and semantics include explicit notations for expressing time and concurrencies, which are the primary attributes of hardware. Languages, whose only characteristics are to express circuit connectivity within a hierarchy of blocks, are properly classified as netlist languages. One of the most popular netlist formats and industry standards is EDIF, acronym for Electronic Data Interchange Format ([EIA2004]).

Traditional programming languages such as C/C⁺⁺ (augmented with special constructions or class libraries) are sometimes used for describing electronic circuits. They do not include any capability for expressing time explicitly and, consequently, are not proper hardware description languages. Nevertheless, several products based on C/C⁺⁺ have recently appeared: Handel-C ([CEL2004]), System-c ([SYS2004]), and other Java-like based such as JHDL ([JHD2004]) or Forge ([XIL2004d]).

Using a proper subset of nearly any hardware description or software programming language, software programs called synthesizers can infer hardware logic operations ...