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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
book

Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
March 2006
Intermediate to advanced
576 pages
11h 43m
English
Wiley-Interscience
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

14.7 BIBLIOGRAPHY

[COR1999] M. A. Cornea-Hasegan, R. A. Golliver, and P. Markstein, Correctness proofs outline for Newton–Raphson based floating-point divide and square root algorithms. Proceedings of the 14th IEEE Symposium on Computer Arithmetic, 1999, pp. 96–105.

[DAS1995] D. DasSarma and D. W. Matula, Faithfull bipartite ROM reciprocal tables. Proceedings of the 12th IEEE Symposium on Computer Arithmetic, 1995, pp. 17–28.

[GAR1959] H. L. Garner, The residue number system. IRE Trans. Electron. Comput., EC 8: 140–147 (1959).

[SZA1967] N. S. Szabo and R. I. Tanaka, Residue Arithmetic and Its Applications to Computer Technology. McGraw-Hill, New York, 1967.

[TAN1991] P. K. Tang, Table look-up algorithms for elementary functions and their error analysis. Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991, pp. 232–236.

Synthesis of Arithmetic Circuits: FPGA, ASIC, and Embedded Systems By Jean-Pierre Deschamps, Géry J. A. Bioul, and Gustavo D. Sutter Copyright © 2006 John Wiley & Sons, Inc.

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