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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
book

Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
March 2006
Intermediate to advanced
576 pages
11h 43m
English
Wiley-Interscience
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

4.2 SUBTRACTION OF NATURAL NUMBERS

The following (pencil and paper) algorithm computes the n-digit representation of z = xybin where bin is an initial borrow equal to 0 or 1; if z is negative—that means that z is not a natural number—the output borrow q(n) is equal to 1.

Algorithm 4.17 Subtraction

q(0):=b_in;
for i in 0..n-1 loop
    if x(i)-y(i)-q(i)<0 then q(i+1):=1; else q(i+1):=0;
    end if; r(i):=(x(i)-y(i)-q(i)) mod B;
end loop;
negative:=q(n);

Another method consists in treating the subtraction of natural numbers as a particular case of the subtraction of integers (next section).

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ISBN: 9780471687832Purchase book