
54 Embedded systems design
the results. To prevent pipeline stalling, an internal Harvard
architecture is used to allow simultaneous instruction and oper-
and fetches. It has been optimised for many instructions and
addressing modes so that single-cycle execution can be achieved.
The early pipeline stages are effectively duplicated to allow both
paths of a branch instruction to be processed until the path
decision is taken. This removes pipeline stalls and the subsequent
performance degradation. While integer instructions are being
executed, the floating point unit is free to execute floating point
instructions.
Data
registers
Address
registers
PC
CCR
A7’/ ...