Embedded Systems Design, 2nd Edition

Basic peripherals 163

• Ready receive/FIFO full (either channel)

As previously discussed, interrupts are ideal for the effi-

cient handling and control of receive buffers. This interrupt

indicates that there is data ready.

• Transmitter ready (either channel)

This is similar to the previous interrupt and is used to

indicate that the transmitter is ready to take data for trans-

mission.

DMA controllers

Direct memory access (DMA) controllers are frequently an

elegant hardware solution to a recurring software/system prob-

lem of providing an efficient method of transferring data from a

peripheral to memory.

In systems without DMA, the solution is to use the ...