three preload registers have been added to the basic architecture
previously described. These are preloaded using three separate
accesses prior to writing to the Z control bit in the control register.
This transfers the contents of the preload register to the counter as
a single operation.
5 bit pre-scalar
342652
342652
HighMidLow
24 bit counter
24 bit
preload
register
24 bit
counter
Zero comparison and control
Clock
TinToutTiack
System clock
Preload control
External
clock
The MC68230 timer/counter architecture
Instead of writing to the counter to either reset it or initialise
it, the host processor uses a combination of preload ...
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