October 2002
Intermediate to advanced
430 pages
14h 57m
English
Content preview from Embedded Systems Design, 2nd Edition
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138 Embedded systems design
three preload registers have been added to the basic architecture
previously described. These are preloaded using three separate
accesses prior to writing to the Z control bit in the control register.
This transfers the contents of the preload register to the counter as
a single operation.
5 bit pre-scalar
34 26 52
34 26 52
High Mid Low
24 bit counter
24 bit
preload
register
24 bit
counter
Zero comparison and control
Clock
Tin Tout Tiack
System clock
Preload control
External
clock
The MC68230 timer/counter architecture
Instead of writing to the counter to either reset it or initialise
it, the host processor uses a combination of preload ...
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