Embedded Systems Design, 2nd Edition

134 Embedded systems design

on a power of two or through a pre-scalar which effectively scales

down or divides the clock by the value that is written into the pre-

scalar register. The divided clock is then passed to a counter which

is normally configured in a count-down operation, i.e. it is loaded

with a preset value which is clocked down towards zero. When a

zero count is reached, this causes an event to occur such as an

interrupt of an external line changing state. The final block is

loosely described as an I/O control block but can be more sophis-

ticated than that. It generates interrupts and can control the

counter based on external signals which ...