Embedded Systems Design, 2nd Edition

78 Embedded systems design

preference to DRAM for this reason. Although the SRAM cell

contains more transistors, the cell only uses power when it is being

switched. If the cell is not accessed then the quiescent current is

extremely low. DRAM on the other hand has to be refreshed by

external bus accesses and these consume a lot of power. As a result,

the DRAM memory will have a far higher quiescent current than

that of SRAM.

The SRAM memory interface is far simpler than that of

DRAM and consists of a non-multiplexed address bus and data

bus. There is normally a chip select pin which is driven from other

address pins to select a particular SRAM when they ...