Embedded Systems Design, 2nd Edition

Memory systems 121

static RAMs. They are, as their part numbering suggests, designed

to support the MC68040 and the Intel 80486 bus burst protocols.

These parts offer access times of 15 and 20 ns.

The MCM62940 has an on-chip burst counter that exactly

matches the MC68040 wrap-around burst sequence. The address

and other control data can be stored either by using the asynchro-

nous or synchronous signals from the MC68040 depending on the

design and its needs. A late write abort is supported which is

useful in cache designs where cache writes can be aborted later in

the cycle than normally expected, thus giving more time to decide

whether the access should ...