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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

CONTENTS

Preface

1 Digital System Modeling and Simulation

1.1 Objectives

1.2 Modeling, Synthesis, and Simulation Design

1.3 History of Digital Systems

1.4 Standard Logic Devices

1.5 Custom-Designed Logic Devices

1.6 Programmable Logic Devices

1.7 Simple Programmable Logic Devices

1.8 Complex Programmable Logic Devices

1.9 Field-Programmable Gate Arrays

1.10 Future of Digital Systems

Problems

2 Number Systems

2.1 Objectives

2.2 Bases and Number Systems

2.3 Number Conversions

2.4 Data Organization

2.5 Signed and Unsigned Numbers

2.6 Binary Arithmetic

2.7 Addition of Signed Numbers

2.8 Binary-Coded Decimal Representation

2.9 BCD Addition

Problems

3 Boolean Algebra and Logic

3.1 Objectives

3.2 Boolean Theory

3.3 Logic Variables and Logic Functions

3.4 Boolean Axioms and Theorems

3.5 Basic Logic Gates and Truth Tables

3.6 Logic Representations and Circuit Design

3.7 Truth Table

3.8 Timing Diagram

3.9 Logic Design Concepts

3.10 Sum-of-Products Design

3.11 Product-of-Sums Design

3.12 Design Examples

3.13 NAND and NOR Equivalent Circuit Design

3.14 Standard Logic Integrated Circuits

Problems

4 VHDL Design Concepts

4.1 Objectives

4.2 CAD Tool-Based Logic Design

4.3 Hardware Description Languages

4.4 VHDL Language

4.5 VHDL Programming Structure

4.6 Assignment Statements

4.7 VHDL Data Types

4.8 VHDL Operators

4.9 VHDL Signal and Generate Statements

4.10 Sequential Statements

4.11 Loops and Decision-Making Statements

4.12 Subcircuit Design

4.13 Packages and Components

Problems

5 Integrated ...

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Publisher Resources

ISBN: 9780470900550Purchase book