Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

6.2 LOGIC FUNCTION OPTIMIZATION PROCESS

The process of digital design consists of three steps. The first step is to design a truth table according to specifications, then minimize the logical expression obtained from the truth table using optimization techniques, and finally, implement the minimized expression using logic gates. The minimization or optimization step is very important in both ASIC- and PLD-based designs. Minimization is the process of deriving the logical expression with a minimal number of literals, thereby reducing the number of gates and gate inputs and thus reducing the cost and chip area. By optimizing the logical expression, we minimize the number of inputs on first- and second-level gates. While minimizing any expression, we assume that both true and complemented versions of all inputs are available. There are different methods of optimizing logic expressions. The most popular ways to illustrate minimization steps are to use Karnaugh maps and prime implicant charts.