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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

3.9 LOGIC DESIGN CONCEPTS

If a function is specified in the form of a truth table, an expression that realizes the function can be obtained by considering the rows in the table for which the function is equal to 1 or 0, called the sum-of-products and the product-of-sums, respectively. For a function of n variables, a product term in which each of the n variables appears once is called a minterm. For each row of the truth table, a minterm is formed by the product of the variables (if equal to 1) or their complements (if equal to 0). Similarly, for each row of the truth table, a maxterm is formed by the sum of the variables (if equal to 0) or their complements (if equal to 1). The construction of minterms and maxterms for a logic function is independent of its output. This concept of minterm and maxterm evaluation is illustrated in Figure 3.9, where the rows have been numbered 0 through 7 for reference. All possible combinations of the inputs for a three-variable minterm and maxterms are shown in the figure. The first row, row 0, shows x = y = z = 0, which has a corresponding minterm represented by images and a corresponding maxterm represented by x + y + z. To further simplify reference to individual minterms and maxterms, they are identified by an index that corresponds to the row numbers. For example, the minterm for row 0 will be referred to as m0, and the maxterm for the same row will ...

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Publisher Resources

ISBN: 9780470900550Purchase book