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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

4.2 CAD TOOL-BASED LOGIC DESIGN

Today's digital integrated circuits are designed to perform highly complex functions. Their design would be very challenging (and nearly impossible) if it were not for the availability of the numerous CAD (computer-aided design) tools used for the following tasks: design entry, simulation, synthesis and optimization, and physical design. Initially, the specifications of the system to be designed are derived from the requirements.

  1. Design entry. Design entry is the first step in the design process using CAD tools. A designer describes the circuit to be implemented using some design-entry method provided by the tools. The most common design-entry method is to write a hardware description language program in VHDL or Verilog, which can be compiled using CAD toolsto simulate the design, synthesize, optimize, and generate the circuit implementation. Other methods of design entry include schematic entry (the circuit is drawn using symbols from a library supported by the tool), and entry using truth tables (where inputs and corresponding outputs are described using a truth table in a text file).
  2. Simulation. Once the design entry is completed, the design is tested for correct functionality using simulation. The CAD tool that performs this job is called a functional simulator. For simulation, the user has to supply to the simulator “test vectors” for the inputs and expected outputs. Simulation is also performed after synthesis, which is the process of translating ...
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Publisher Resources

ISBN: 9780470900550Purchase book