Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

1.8 COMPLEX PROGRAMMABLE LOGIC DEVICES

PALs and PLAs are useful for small digital circuits which do not require more than 32 inputs and outputs. To implement circuits that need more inputs and outputs, multiple PLAs or PALs can be used. However, this will compromise the performance of the design and also occupy more area on the PCB. In such situations, a complex programmable device (CPLD) would be a better choice. A CPLD comprises multiple circuit blocks on a single chip. Each block is similar to a PLA or PAL. There could be as few as two such blocks in a CPLD and 100 or more such blocks in larger CPLDs. These logic blocks are interconnected through a programmable switch matrix or interconnection array, which allows all blocks of the CPLD to be interconnected. Figure 1.2 shows the internal structure of a CPLD. As a result of this configuration, the architecture of the CPLD is less flexible. However, the propagation delay of a CPLD is predictable. This advantage allowed CPLDs to emulate ASIC systems, which operate at higher frequencies.

Figure 1.2 CPLD Internal Structure