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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

6.4 TWO-VARIABLE KARNAUGH MAP

An example of a Karnaugh map for a two-variable function is shown in Figure 6.3. Each value of the truth table is represented in the Karnaugh map. A 1 appears in both columns of the top row. Therefore, there exists a single product term that can cause f to be equal to 1 when the input variables have values that correspond to either of these cells. These values have been circled and are identified as x1 = 0, but x2 equals 0 for the left column and 1 for the right. This implies that if x1 = 0, then f = 1, regardless of the value of x2. The product term represented by this circle is simply images. Similarly, if x2 is 1, then regardless of x1, the function f will also equal 1. Hence, the minimum realization for the logic function f can be expressed as

images

Figure 6.3 Karnaugh Map Simplification of a Two-Variable Logic Function

images

Algebraic simplification yields the same logic expression. Therefore, to find a minimum implementation for a given logic function, it is necessary to find the smallest number of product terms that produce a value of 1 for all cases. At the same time, the number of these product terms should be as low as possible. Notice how some of the 1's are ...

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ISBN: 9780470900550Purchase book