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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

4.4 VHDL LANGUAGE

VHDL [“VHSIC hardware description language” (VHSIC is “very high-speed integrated circuit”)] is one of the two most popular HDLs, the other being Verilog HDL. The VHDL language is very popular for the design entry of digital circuits into CAD systems, simulation and documentation. VHDL is an extremely complex and sophisticated language, so learning it completely can be a daunting task. However, most designs can be accomplished by learning only a subset of the language. The material presented here is in no way a comprehensive reference for the VHDL language; it only introduces the reader to some important and fundamental concepts of programming with VHDL. More details of the language can be obtained from VHDL-specific textbooks, Web-based tutorials, and published white papers.

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Publisher Resources

ISBN: 9780470900550Purchase book