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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

4.8 VHDL OPERATORS

VHDL provides predefined operators which are used as hardware modeling units. These include logical (or Boolean), arithmetic, and relational operators. The logical operators are listed in Figure 4.17. The NOT operator has one input and one output, whereas the remaining operators are binary operators, which have two input ports and one output port. VHDL relational operators are listed in Figure 4.18. Relational operators are a set of binary logical operators that generate a result of Boolean type: either “true” or “false.” The relational operands are of either bit type or Boolean type, but not of mixed type.

VHDL arithmetic operators are listed in Figure 4.19. Arithmetic operators accept operands of integer type or floating-point type (real type). VHDL does not accept implicit type conversion between integer and floating-point numbers. The operators REM and MOD are defined only for integer numbers. The exponential operator accepts both integer and floating-point numbers with exceptions. The data type of the left operand of the exponential operator defines the data type of the result, and can be integer or floating point. The right operand (exponent) must be of integer type.

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Figure 4.17 VHDL Logical (Boolean) Operators

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Figure 4.18 VHDL Relational Operators

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ISBN: 9780470900550Purchase book