Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

5.6 CMOS LOGIC NETWORKS

Design of logic networks using integrated transistors is an extensive discipline referred to as VLSI technology. Physical aspects of transistors play a major role in the layout of logic gates. VLSI technology is beyond our scope here. Nonetheless, the design concepts illustrated in Section 5.5 can be used to design integrated logic gates using CMOS transistors without exploring their practical aspects in detail. To understand how PMOS and NMOS transistors can be interconnected to realize a logic function, we analyze the CMOS logic circuit in Figure 5.10. We describe the logic function of the circuit by determining the state of each PMOS and NMOS transistor as the input voltages change according to the truth table.

An NMOS transistor is off when its input gate voltage is equal to 0 V, and it is on when its input gate voltage is equal to 5 V. A PMOS transistor is off when its input gate voltage is equal to 5 V, and it is on when its input gate voltage is equal to 0 V. Using these properties of NMOS and PMOS transistors, one should be able to determine the state of each transistor in the logic circuit. The truth table of the integrated logic circuit is also shown in Figure 5.11.

Using the SOP method, the logic function of the integrated logic circuit is evaluated and simplified to the expression

Note that the logic expression is in a complemented form which ...