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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

6.9 INCOMPLETE LOGIC FUNCTIONS

In digital systems there are certain input conditions for which a specific function can never occur or possibly would simply be unimportant. For example, suppose that you have two interlocking switches, A and B, such that both switches cannot be closed at the same time. Therefore, there are only three possible states for the switches. Switch A is open while switch B is closed, switch A is closed while switch B is open, or switches B and A are both open. In digital terms, the inputs are 10, 01, or 00. But the value 11 will never occur. The value that will never occur is called a don't-care condition. Any function with don't-care conditions is said to be specified incompletely. Don't-care states can be an advantage in designing logic circuits. Since a don't care will never occur, the designer can assume that the event is either 1 or 0, whichever helps minimize the cost. Consider the Karnaugh map example in Figure 6.13, which includes don't-care states. Notice that not all the d's are used in the Karnaugh map. Since the don't-care states can be either 1 or 0, they are used to realize minimum sum-of-products or product-of-sums functions.

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Figure 6.11 Karnaugh Map Patterns for Various XOR Logic Expressions

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Figure 6.12 Karnaugh Map Patterns for Various NXOR ...

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Publisher Resources

ISBN: 9780470900550Purchase book