Processor Description Languages

210 CHAPTER 8 TIE

TIE_<name>_Req

TIE_<name>_Out

TIE_<name>_In

TIE_<name>_Rdy

Xtensa Processor

Lookup

Interface

Arbitration Logic

External Memory

Enable

Address

Data

FIGURE 8.3

Top-level connections for a TIE lookup.

lookup coeff {8, Estage} {256, Mstage}

state ROM_DATA 256

operation ROM_LKUP {in AR index}

{out coeff_Out, in coeff_In, out ROM_DATA } {

assign coeff_Out = index;

assign ROM_DATA = coeff_In;

}

8.8 HARDWARE VERIFICATION

The TIE language allows the designer to describe the instruction extensions at a

high level of abstraction. The designer typically specifies only the operands of the

instruction and the combinational relationship between the output and inputs. ...