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Processor Description Languages
book

Processor Description Languages

by Prabhat Mishra, Nikil Dutt
July 2011
Intermediate to advanced
432 pages
14h 36m
English
Morgan Kaufmann
Content preview from Processor Description Languages
82 CHAPTER 4 nML
(a)
(c)
(b)
(d)
jump
IF
IF ID EX1
IF ID EX1
stallstall
target
target 1
1
23
4
5
6
cycles
jump 1
IF ID EX1
. . .
instructions
123 456
jump
IF ID
IF
IF ID EX1
EX1
jump 3
cycle
s
jump 1
ID EX1
IF
jump 2
ID EX1
instructions
123 456cycle
s
jump
IF ID
IF
IF ID EX1
EX1
target
target + 1
jump 1
ID EX1
IF ID EX1
. . .
IF
jump 2
ID EX1
instructions
jump
IF ID
IF
EX1
cycles
jump
1
stalI
l
ID
IF
jump
2
ID EX1
EX1
instructions
12 6345
FIGURE 4.2
Pipeline diagram for conditional jumps: (a) taken; (b) not taken; (c) delayed, taken;
(d) delayed, not taken.
If the jump is taken, see Fig. 4.2(a), the target instruction can only be fetched
the next cycle and the pipeline must be stalled for two cycles. ...
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Publisher Resources

ISBN: 9780123742872