
5.4 Processor Verification 113
■ Clock gating: To reduce the dynamic power of a processor, it is important
to gate the storage elements when no new data is being read. Due to its
overwhelming effect on overall power consumption, commercial gate-level
synthesis tools are currently supporting automatic clock gating. However, to
determine the gating signal, that is, the signal to indicate when a new data is
not available, is an important research problem. In the perspective of LISA, it
is identified by tracing the register write operations to LISA operations [17].
The clock gating for registers as well as pipeline registers is performed by
inserting dedicated ...