Principles of Synchronous Digital Hierarchy

94 Principles of Synchronous Digital Hierarchy

Let us construct a simple scrambler with the help of the above two ele-

ments, to understand the principle (Figure 4.29).

The signal to be transmitted is fed to an Ex-OR gate and the output is trans-

mitted as the scrambler output. However, the output is also fed backand

added to the input in a modulo two logic addition. The resulting output

sequence is a much different sequence, as compared to the input sequence.

Let us take an arbitrary bit sequence at the input, say “1 1 0 0 0 1 0 1,” and

see what the scrambler output is. Please note that the signal at “C” is equal

to the signal at “B” d ...