Principles of Synchronous Digital Hierarchy

128 Principles of Synchronous Digital Hierarchy

telecommunication network to completely retime the bits of the received sig-

nal. This complete retiming facilitates the outgoing bits from the particular

node to be pure and clean, i.e., free from any impairment whatsoever includ-

ing jitter and wander.

All the incoming bits in a receiver are stored in a buffer memory by tim-

ing them through the recovered clock from the incoming bit stream itself.

The outgoing bits from the node transmitter, however, are timed through

an independent accurate clock whose frequency is the same as the average

long-term frequency of the incoming bits. (Impairments such ...