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Principles of Synchronous Digital Hierarchy
book

Principles of Synchronous Digital Hierarchy

by Rajesh Kumar Jain
October 2018
Intermediate to advanced
555 pages
17h 33m
English
CRC Press
Content preview from Principles of Synchronous Digital Hierarchy
284 Principles of Synchronous Digital Hierarchy
STM is “STM-0” and the higher-order ones are STM-4, 16, 64, and 256. STM-0
is obtained directly through AU-3 (instead of multiplexing it by 3 to get
AUG), and higher-order STMs are obtained by simply multiplexing the AUG
by the order of STM, before adding the SOH. The details are shown in Figure
10.31 along with the operations performed at various stages of multiplexing.
10.14.1 STM-O
As can be seen from Figure 10.31, STM-0 consists of a single administrative
unit of level 3, i.e., AU-3. Although STM-0 is dened in the ITU-T multiplex-
ing hierarchy, it is rarely used by the manufactu
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Publisher Resources

ISBN: 9781466517271