October 2006
Intermediate to advanced
544 pages
20h 23m
English
Content preview from Digital Systems: Principles and Design
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275Implementation of Combinational Logic by Standard ICs and Programmable ROM Memories
FIGURE 12.7 An EPROM model diagram for an IC chip 2k ´ 8 2716 showing the address inputs, one select input and m
outputs and other pins.
The laboratory erase and programming facilities are not available in case of ROM, un-
like an EPROM because a ROM has to be programmed at its manufacturing stage itself.
Figure 12.7 shows an EPROM model diagram for a 2k ´ 8 IC chip 2716.
(1) There is an additional pin in the EPROM that should be applied a specified voltage,
Vpp (typical values are + 25 V, + 21 V or + 12.5 V) during programming (writing) of
data bits (byte) at a selected ...
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