Digital Systems: Principles and Design

393Sequential Circuits for Registers and Counters

16.4 RIPPLE COUNTER

16.4.1 Cascaded Divide-By-2

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Circuit as a Ripple Counter

We have seen above that a T FF acts as a divide-by-2 circuit. If Q output of the FF connects

to the T input of the second FF, and the Q output from the second FF connects to T-input of

the third flip flop and so on, the FFs are said to be in a cascade (Figure 16.7(a)). The output

transition partial table of this cascade asynchronous circuit for a 4-bit ve going input pulse

triggered ripple counter is given in Figure 16.7(b).

FIGURE 16.7 (a) Cascaded divide-by-two circuits using T –ve edge triggering pulse to get a 4-bit binary ...