Digital Systems: Principles and Design

223Binary Arithmetic and Decoding and Mux Logic Units

number of literals in F. Its outputs reflect the minterms with each minterm at each of the

output. Therefore, if the OR operations are done on Y3, Y7, Y9 and Y 10 outputs of the four

active 1 decoders with four binary inputs and 16 line outputs from Y 0 to Y 15, then the F

implements by Y3 + Y7 + Y 9 + Y10. A decoder circuit can be used to implement AND-OR

circuit SOP Boolean expression when active output is 1. Example 10.8 will give a logic

design and implementation using a decoder for F

1

= S m(3, 7, 9, 10) and F

2

is S m (2, 7, 12,

15).

Assume a Boolean function F is P M(1, 7, 9, 13). Consider ...