October 2006
Intermediate to advanced
544 pages
20h 23m
English
Content preview from Digital Systems: Principles and Design
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415Sequential Circuits for Registers and Counters
EXERCISES
1. Design a PIPO, which is a 4-bit buffer register with parallel in (loading) and parallel
output (storing). [Hint: refer figure 16.2(a), use the AND buffers at both the ends.]
2. Show the state diagram from a state table corresponding to a SIPO. (Hint: Refer sate
table at Table 16.2).
3. Design a multipurpose behavior of a left shift register, which shift left when channel
inputs, are 01 and circularly shift left when 10, synchronous clear when 11 and no-
shift when 00. (Hint: Refer Example 16.8).
4. Solve the problem in Example 16.2 once again for a left-shift register.
5. Design a SISO circular ...
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