
Implementation of Combinational
Logic by Programmable Logic
Devices
We learnt in Chapter 12 that instead of implementing a minimized circuit using AND-OR
arrays or NANDs or OR-AND arrays or NORs or ICs for the decoders, encoders, multi-
plexers or demultiplexers, or binary arithmetic adders, adder/subtractors, code convert-
ers, comparator, bit-wise 8-bit AND, OR, XOR circuits or parity generators, a complex
combinational circuit can be easily assembled by programmable logic memories (ROM,
EPROM, EEPROM or Flash or OTP).
In this chapter, we shall learn about two other forms of PLDs called PAL and PLA. We
shall also study the implementation of the circuits ...